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Virtex-6 FPGA ML605开发评估技术方案

来源:    作者:    发布时间:2014-12-29 07:52:31    浏览量:


• GTH transceivers: 2.488 Gb/s to beyond 11 Gb/s

• Integrated 10/100/1000 Mb/s Ethernet MAC block

• Supports 1000BASE-X PCS/PMA and SGMII using GTX transceivers

• Supports MII, GMII, and RGMII using SelectIO technology resources

• 2500Mb/s support available

• 40 nm copper CMOS process technology

• 1.0V core voltage (-1大电流电感, -2, -3 speed grades only)

• Lower-power 0.9V core voltage option (-1L speed grade only)

• High signal-integrity flip-chip packaging available in standard or Pb-free package options

Virtex®-6 FPG变压器与电感器设计A典型应用:


图1.骨干网OTU-4成帧和EFEC框图(有线通信)

图2. LTE 2x2无线电设计框图(无线基础设备)

图3.支持SD/HD/3G-SDI接口的新一代交换框图(广播通信)

Virtex®-6 FPGA ML605评估套件

The Virtex®-6 FPGA ML605 Evaluation Kit provides a development environment for system designs that demand high-performance, serial connectivity and advanced memory interfacing. The ML605 is supported by pre-verified reference designs and industry-standard FPGA Mezzanine Connectors (FMC) which allow scaling and customization with daughter cards. Integrated tools help streamline the creation of elegant solutions to complex design requirements.

The ML605 board enables hardware and software developers to create or evaluate designs targeting the Virtex®-6 XC6VLX240T-1FFG1156 FPGA.

The ML605 provides board features common to many embedded processing systems. Some commonly used features include: a DDR3 SODIMM memory, an 8-lane PCI大功率电感贴片电感器 Express® interface, a tri-mode Ethernet PHY, general purpose I/O, and a UART. Additional user desired features can be added through mezzanine cards attached to the onboard high-speed VITA-57 FPGA Mezzanine Connector (FMC) high pin count (HPC) expansion connector, or t电感器生产厂家he onboard VITA-57 FMC low pin count (LPC) connector.

This information includes:

• Current version of this user guide in PDF format

• Example design files for demonstration of Virtex-6 FPGA features and technology

• Demonstration hardware and software configuration files for the System ACE™ CF controller, Platform Flash configuration storage device, and linear flash chip

• Reference design files

• Schematics in PDF and DxDesigner formats

• Bill of materials (BOM)

• Printed-circuit board (PCB) layout in Allegro PC插件电感B format

• Gerber files for the PCB (Many free or shareware Gerber file viewers are available on the internet for viewing and printing these files.)

• Additional documentation, errata, frequently asked questions, and the latest news

Virtex®-6 FPGA ML605评估套件主要特性:

The ML605 provides the following features:

• 1. Virtex-6 XC6VLX240T-1FFG1156 FPGA

• 2. 512 MB DDR3 Memory SODIMM

• 3. 128 Mb Platform Flash XL

• 4. 32 MB Linear BPI Flash

• 5. System ACE CF and CompactFlash Connector

• 6. USB JTAG

• 7. Clock Generation

♦ Fixed 200 MHz oscillator (differential)

♦ Socketed 2.5V oscillator (single-ended)

♦ SMA connectors (differential)

♦ SMA connectors for MGT clocking

• 8. Multi-Gigabit Transceivers (GTX MGTs)

♦ FMC - HPC connector

♦ FMC - LPC connector

♦ SMA

♦ PCIe

♦ SFP Module connector

♦ Ethernet PHY SGMII interface

• 9. PCI Express Endpoint Connectivity

♦ Gen1 8-lane (x8)

♦ Gen2 4-lane (x4)

• 10. SFP Module Connector

• 11. 10/100/1000 Tri-Speed Ethernet PHY

• 12. USB-to-UART Bridge

• 13. USB Controller

• 14. DVI Codec

• 15. IIC Bus

♦ IIC EEPROM - 1 KB

♦ DDR3 SODIMM socket

♦ DVI CODEC

♦ DVI connector

♦ FMC HPC connector

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高边开关的作用在于降低低压汽车,工业照明和电机控制应用

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